A VLSI Chip for Wavelet Image Compression
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
We have designed a VLSI chip for wavelet image compression which is especially suited for CCD area sensors as well as for new technology approaches in CMOS image sensors. The design has been developed for maximal resolutions of 3072 times 2048 pixels. The used compression algorithm gives a PSNR (peak signal to noise ratio) of up to 39 dB at 1 bit/pixel for common test images.
Details
| Original language | English |
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| Title of host publication | 1999 IEEE International Symposium on Circuits and Systems (ISCAS) |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Pages | IV-271-274 |
| Number of pages | 4 |
| ISBN (print) | 0-7803-5471-0 |
| Publication status | Published - 1 Dec 1999 |
| Peer-reviewed | Yes |
Publication series
| Series | IEEE International Symposium on Circuits and Systems (ISCAS) |
|---|---|
| ISSN | 0271-4302 |