A Versatile Mapping Approach for Technology Mapping and Graph Optimization

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Alessandro Tempia Calvino - , Swiss Federal Institute of Technology Lausanne (EPFL) (Author)
  • Heinz Riener - , Swiss Federal Institute of Technology Lausanne (EPFL) (Author)
  • Shubham Rai - , Chair of Processor Design (cfaed) (Author)
  • Akash Kumar - , Chair of Processor Design (cfaed) (Author)
  • Giovanni De Micheli - , Swiss Federal Institute of Technology Lausanne (EPFL) (Author)

Abstract

This paper proposes a versatile mapping approach that has three objectives: i) it can map from one technology-independent graph representation to another; ii) it can map to a cell library; iii) it supports logic rewriting. The method is cut-based, mitigates logic-sharing issues of previous graph mapping approaches, and exploits structural hashing. The mapper is the first one of its kind to support remapping among various graph representations, thus enabling specialized mapping to emerging technologies (such as AQFP) and for security applications (such as XAG-based design). We show that mapping to MIGs improves area by 10% as compared to the state of the art, and that technology mapping is 18% faster than ABC with slightly better results.

Details

Original languageEnglish
Title of host publication 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)
PublisherIEEE, New York [u. a.]
Pages410-416
Number of pages7
ISBN (electronic)978-1-6654-2135-5
ISBN (print)978-1-6654-2136-2
Publication statusPublished - 2022
Peer-reviewedYes

Publication series

SeriesAsia and South Pacific Design Automation Conference (ASP-DAC)
Volume2022-January

Conference

Title27th Asia and South Pacific Design Automation Conference, ASP-DAC 2022
Duration17 - 20 January 2022
CityVirtual, Online
CountryTaiwan, Province of China