A System-On-Chip Realization of a CMOS Image Sensor with Programmable Analog Image Preprocessing
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
We present a system-on-chip realization of a CMOS image sensor with on-chip block transformation or spatial convolution capabilities and digital output. The necessary operations are realized with analog current-mode circuits. The digital kernel-coefficients for transformations or convolutions can be set arbitrarily. The prototype implementation is comprised of a 128/spl times/64 pixel CMOS image sensor, signal conditioning, a low-power mixed-signal multiplier array and a dedicated multi-input pipelined A/D converter. The design is scalable up to high sensor resolutions. The prototype was implemented in a standard 0.6 /spl mu/m, double metal, double poly CMOS technology and dissipates 100 mW at 5 V power supply.
Details
| Original language | English |
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| Title of host publication | ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Pages | IV-486 - IV-489 |
| Number of pages | 4 |
| ISBN (print) | 0-7803-6685-9 |
| Publication status | Published - 1 May 2001 |
| Peer-reviewed | Yes |
Publication series
| Series | IEEE International Symposium on Circuits and Systems (ISCAS) |
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| ISSN | 0271-4302 |
External IDs
| Scopus | 32844464665 |
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