A Self-Reconfiguring Cache Architecture to Improve Control Quality in Cyber-Physical Systems.

Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review

Contributors

  • Mohammad Shihabul Haque - (Author)
  • Sriram Vasudevan - (Author)
  • Alamuri Sriram Nihar - (Author)
  • Arvind Easwaran - (Author)
  • Akash Kumar - , Chair of Processor Design (cfaed) (Author)
  • Y. C. Tay - (Author)

Details

Original languageUndefined
Title of host publicationISORC
Pages116-123
Number of pages8
Publication statusPublished - 2018
Peer-reviewedYes

External IDs

Scopus 85051558770

Keywords

Research priority areas of TU Dresden