A Multiple Input and Gain Adjustable Phase Detector in 130 nm SiGe BiCMOS Technology

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

Abstract

Mutual network synchronization of electronic os-cillators relies on their bidirectional coupling. Each oscillator receives at least one input signal from another oscillator. However, in most cases there is more than one input. Consequently, the architecture design of the phase-detectors (PD) of phase-locked loop (PLL) needs to be revised to allow for more than one input signal. This work investigates a PD which has three external inputs, in addition to the feedback signal. It is designed and fabricated in 130 nm SiGe BiCMOS technology. The inputs can be fed independently of each other over a wide range of high input frequencies, ranging from 6 GHz to 17 GHz and it's gain can be adjusted to correct for variations in the PD output characteristics and to control the PLL's loop gain. It's architecture is scalable and can be easily modified to accommodate more input signals. Hence, arbitrary network coupling topologies where PLLs receive input from many other nodes in the network can be realized. It enables setting up, e.g., distributed systems of mutually coupled sensors and sustainable analog computers, so called Ising machines.

Details

Original languageEnglish
Title of host publicationIEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)
PublisherIEEE
Pages45-48
Number of pages4
ISBN (electronic)978-1-6654-9132-7
ISBN (print)978-1-6654-9133-4
Publication statusPublished - Oct 2022
Peer-reviewedYes

Conference

TitleIEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)
Abbreviated titleBCICTS
Conference number
Duration16 - 19 October 2022
Location
CityPhoenix
CountryUnited States of America

External IDs

Scopus 85150015184
ORCID /0000-0001-5748-3005/work/142239379
ORCID /0000-0001-6778-7846/work/142240160
ORCID /0000-0002-6200-4707/work/145698426

Keywords

Research priority areas of TU Dresden

DFG Classification of Subject Areas according to Review Boards

Keywords

  • BiCMOS integrated circuits, Phase detection,Couplings , Network topology , Computer architecture , BiCMOS integrated circuits , Topology , Synchronization , Phase locked loops