A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm.
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Details
Original language | Undefined |
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Title of host publication | FPL |
Pages | 1-4 |
Number of pages | 4 |
Publication status | Published - 2013 |
Peer-reviewed | Yes |
Externally published | Yes |
External IDs
Scopus | 84898653084 |
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