A Combined Dynamic and Static Frequency Divider for a 40GHz PLL in80nm CMOS
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Details
| Original language | English |
|---|---|
| Title of host publication | Solid-State Circuits, 2006 IEEE International Conference Digest ofTechnical Papers |
| Pages | 2462-2471 |
| Number of pages | 10 |
| Publication status | Published - 1 Feb 2006 |
| Peer-reviewed | Yes |