A Combined Dynamic and Static Frequency Divider for a 40GHz PLL in80nm CMOS
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
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Details
Original language | English |
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Title of host publication | Solid-State Circuits, 2006 IEEE International Conference Digest ofTechnical Papers |
Pages | 2462-2471 |
Number of pages | 10 |
Publication status | Published - 1 Feb 2006 |
Peer-reviewed | Yes |