A 10 Bit Phase-Interpolator-Based Digital-to-Phase Converter for Accurate Time Synchronization in Ethernet Applications

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Abstract

This work presents a 10 Bit digital-to-phase converter (DPC), for usage within an accurate time synchronization via Ethernet with a nominal frequency of 125 MHz. It is based on a 16-phase ring oscillator, stabilized by a phase-locked loop (PLL), followed by a 6 Bit phase-interpolator (PI). The DPC generates 1024 clock phases with a nominal resolution of 0.35°, covering a full 360° phase span. A prototype of the DPC is fabricated in a 180 nm technology from TSMC and achieves a differential and integral nonlinearity (DNL and INL) of 0.47° and 2.33o, respectively, while the power consumption is only 4.0 mW. As the DPC is based on a built-in PLL, it requires only a low frequency reference clock, which makes it very well suited for easy integration in complex systems (e.g. time synchronization via Ethernet transceivers).

Details

Original languageEnglish
Title of host publication27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
PublisherIEEE
Number of pages4
ISBN (electronic)978-1-7281-6044-3
ISBN (print)978-1-7281-6045-0
Publication statusPublished - 25 Nov 2020
Peer-reviewedYes

Publication series

SeriesIEEE International Conference on Electronics, Circuits and Systems (ICECS)

Conference

Title2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Duration23 - 25 November 2020
LocationGlasgow, UK

External IDs

Scopus 85099474331
ORCID /0000-0003-2197-6080/work/142254593

Keywords

Research priority areas of TU Dresden

Keywords

  • Clocks, Phase locked loops, Phase measurement, Ethernet, Transistors, Synchronization, Tuning