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The design of integrated circuits (ICs) is an expensive undertaking. Depending on the semiconductor technology, the license costs of commercial design tools can significantly exceed the labor costs of their users. Current funding programs therefore support research into new design tools and methods using open-source software. These initiatives are intended to help small and medium-sized companies in particular to save costs and thus enable them to develop their own ICs.

An important step in IC design is layout verification, in which the mask layout is extensively checked before production. This includes the design rule check (DRC), which ensures compliance with the technology rules specified by the manufacturer. The design rules are often only provided by foundries in proprietary file formats for commercial verification tools. The terms of use prohibit the use of the formats with open-source tools.

This talk is about how we were still able to develop the DRC runset for IHP's OpenPDK. It begins with an overview of existing open-source tools for layout verification. This is followed by a presentation of our Babylon program for generating DRC runsets for the open-source software KLayout.