ZuSE-KI-Mobil: AI Chip Design Platform for Automotive and Industrial Applications
Publikation: Beitrag in Fachzeitschrift › Forschungsartikel › Eingeladen › Begutachtung
Beitragende
Abstract
The ZuSE-KI-Mobil (ZuKIMo) research project presents a heterogeneous system-on-chip (SoC) designed for use in a variety of automotive and industrial edge applications. Implemented using GlobalFoundries (GF) 22-nm FD-SOI technology, the SoC features a modular architecture with a configurable, bit-serial, mixed-precision neural processing unit (NPU) core. This core can be adapted to different use cases, comes with a compact instruction set, and improves the performance of dilated convolutions. A hardware-accelerated, tunable image signal processor (ISP) hyperparameter pipeline reduces tuning time and increases detection confidence for AI tasks. The system also incorporates a selective, per-layer fault-tolerance mechanism and supports rapid prototyping via an Apache TVM-driven compiler flow and cycle-accurate simulation. The adaptable hardware generation process is designed with future chiplet-based scaling in mind, providing a flexible foundation for upcoming heterogeneous SoC designs.
Details
| Originalsprache | Englisch |
|---|---|
| Seiten (von - bis) | 2961-2974 |
| Seitenumfang | 14 |
| Fachzeitschrift | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Jahrgang | 33 |
| Ausgabenummer | 11 |
| Publikationsstatus | Veröffentlicht - Nov. 2025 |
| Peer-Review-Status | Ja |
Externe IDs
| ORCID | /0009-0007-8401-7852/work/211722634 |
|---|
Schlagworte
Forschungsprofillinien der TU Dresden
Schlagwörter
- AI accelerator, autonomous systems, compiler, edge computing, system-on-chip (SoC)