Towards Large-Scale Top-Down Microarchitecture Analysis Using the Score-P Framework

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Abstract

The Top-Down Microarchitecture Analysis Method introduced by Yasin [31] established a simple yet effective generic approach to performance analysis. It can be used to analyze whichmicro architectural resource poses a bottleneck during the execution of arbitrary codes. The recently introduced Golden Cove microarchitecture used in Intel’s Sapphire Rapids processors provides an extended, automated hardware support for this analysis. In this paper, we describe the implementation of this micro architectural feature, integrate support into the performance measurement infrastructure Score-P, and explore the capabilities of the resulting tool with two example applications: The Computational Fluid Dynamics (CFD) solver for turbo-machinery applications Hydra [23], and the open-source weather and climate model ICON [32].

Details

OriginalspracheEnglisch
TitelEuro-Par 2024: Parallel Processing Workshops
Redakteure/-innenSilvina Caino-Lores, Demetris Zeinalipour, Thaleia Dimitra Doudali, David E. Singh, Gracia Ester Martín Garzón, Leonel Sousa, Diego Andrade, Tommaso Cucinotta, Donato D'Ambrosio, Patrick Diehl, Manuel F. Dolz, Admela Jukan, Raffaele Montella, Matteo Nardelli, Marta Garcia-Gasulla, Sarah Neuwirth
Herausgeber (Verlag)Springer Science and Business Media B.V.
Seiten189-200
Seitenumfang12
ISBN (elektronisch)978-3-031-90200-0
ISBN (Print)978-3-031-90199-7
PublikationsstatusVeröffentlicht - 2025
Peer-Review-StatusJa

Publikationsreihe

ReiheLecture notes in computer science
Band15385 LNCS
ISSN0302-9743

Konferenz

Titel30th International European Conference on Parallel and Distributed Computing
KurztitelEuro-Par 2024
Veranstaltungsnummer30
Dauer26 - 30 August 2024
Webseite
OrtUniversity Carlos III of Madrid
StadtMadrid
LandSpanien

Externe IDs

ORCID /0000-0001-9601-8683/work/188000050

Schlagworte