Emerging nanotechnologies based reconfigurable field-effect transistors (RFETs) allow switching between p-type and n-type behavior at runtime upon application of different bias potentials. While prior works have mainly focused on security schemes using RFETs, here we revisit the underlying security promises, and furthermore, showcase certain circuit vulnerabilities which can lead to adversarial scenarios. More specifically, first, we explore how transistor-level reconfigurability can be leveraged for logic locking and split manufacturing in the pretext of RFET-based modeling of the ITC-99 circuits. We find that with only 30% reconfigurable logic gates, we can induce 100% output error rate (OER) and 31% Hamming distance(HD) on split-manufacturing schemes. Second, which is arguably more disruptive, we explore how the very reconfigurability can be exploited to induce either short-circuit or open-circuit configurations, essentially destroying the reliability, electrical, or functional characteristics of the chip. By means of fault modeling for such exploitation, 100% OER (across all benchmarks) as well as 36.5%, 40.02%, and 6.34% HD, respectively, can be expected for the MCNC, EPFL, and ITC-99 benchmarks. The novelty and severity of such disruptive scenario lies in the fact that they can be readily realized in an actual on-field RFET-based chip, either as an adversarial or a fail-safe measure.