In this paper we present a new roll-to-roll embossing process allowing the replication of micro patterns with feature sizes down to 0.5 μm. The embossing process is suitable for the continuous output of micro patterned structures and is not accompanied by waste produced during the initial hot embossing phase. This is due to the fact that the foil is not moved during the time needed to reach a thermal steady state. A new type of embossing master is used which is based on flexible silicon substrates. The embossing pattern with sub-μm topographic resolution is prepared on silicon wafers by state of the art lithography and dry etching techniques. The wafers are thinned down to a thickness of 40 μm, which guarantees the mechanical flexibility of the embossing masters. Up to 20 individual chips with a size of 20 × 20 mm2 were assembled on a roller. Embossing experiments with COC foils showed a good replication of the silicon master structures in the foil. The maximum depth of the embossed holes was about 70% of the master height.