Power-Aware Computing Systems on FPGAs: A Survey

Publikation: Beitrag zu KonferenzenPaperBeigetragenBegutachtung

Abstract

A major concern with battery-operated devices is power-awareness and its appropriate computing. The power dissipation of such systems is usually considered a hardware problem. However, it can be solved by implementing power-aware techniques. Such algorithms have shown promise as an approach to dynamically adjust the power consumption of embedded systems within feasible ranges. One of the most popular power-saving techniques is Dynamic Voltage and Frequency Scaling (DVFS). Besides the power management, an accurate and fast power monitoring service is necessary on embedded platforms to reduce power consumption. In this paper, we provide an overview of power-aware computing platforms based on different application domains. It intends to summarize recently published research results related to power-aware computing architectures using Field Programmable Gate Arrays (FPGAs). We identify trends and highlight key future directions for power management techniques and power monitoring services.

Details

OriginalspracheEnglisch
Seiten45-51
Seitenumfang7
PublikationsstatusVeröffentlicht - 2021
Peer-Review-StatusJa

Konferenz

Titel2021 31st International Conference on Field Programmable Logic and Applications
KurztitelFPL 2021
Veranstaltungsnummer31
Dauer30 August - 3 September 2021
Ortonline
StadtDresden
LandDeutschland

Externe IDs

ORCID /0000-0003-2571-8441/work/142240504
Scopus 85125784897

Schlagworte

Schlagwörter

  • FPGAs, Clock gating, DVFS, Fault diagnosis, Power estimator, Power gating