Improvement in Wafer-to-Wafer Hybrid Bonding Using Optimized Chemical Mechanical Planarization Process for Cu Dishing
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
Conventional chemical mechanical planarization (CMP) process applied on certain wafer pattern designs leads to protruded copper (Cu) pads. These protruded Cu pads from opposite to-be-bonded-wafers result in a lot of physical voids during the process of hybrid bonding as they do not allow the adjacent opposite dielectric surfaces to come in close contact. In the presented work, an optimized CMP process was used to reach nearly -1 nm Cu pad recess that improved the hybrid bonding of wafers with significantly less voids as compared to the wafers with protruded Cu pads. Here, the aim is to understand the process and the design connected influences on CMP interactions and subsequently the hybrid bonding results. An optimized three step CMP was employed to polish the wafers with Cu pads electroplated by Cu damascene process. Also, plasma activation on the polished blanket wafers was tried with two different plasma gases (i.e., N2 and O2) and different plasma powers (i.e., 100, 200, 300 and 400 W). Plasma activation done on CMP polished blanket oxide wafers with N2 plasma gas, and 100 W plasma power for 10 s resulted in maximum post-anneal (i.e., at 350 °C for 1 hr) bond strength of 1.41 J/m2. This optimized plasma activation recipe was then used on patterned wafers polished with conventional and novel three step CMP processes, and then hybrid bonded and finally annealed at 350 °C for 1 hr. The bonded pair involving the three step CMP process with recessed Cu pads showed that the interfacial voids have reduced by 44.1 % as compared to the bonded pair involving conventional CMP process with protruded Cu pads.
Details
Originalsprache | Englisch |
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Titel | 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC) |
Herausgeber (Verlag) | IEEE |
Seiten | 373-380 |
Seitenumfang | 8 |
ISBN (elektronisch) | 9798350329575 |
ISBN (Print) | 979-8-3503-2958-2 |
Publikationsstatus | Veröffentlicht - 8 Dez. 2023 |
Peer-Review-Status | Ja |
Konferenz
Titel | 25th Electronics Packaging Technology Conference |
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Kurztitel | EPTC 2023 |
Veranstaltungsnummer | 25 |
Dauer | 5 - 8 Dezember 2023 |
Ort | Grand Copthorne Waterfront Hotel |
Stadt | Singapore |
Land | Singapur |
Externe IDs
Scopus | 85190161693 |
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ORCID | /0000-0001-8576-7611/work/165877213 |
Schlagworte
Schlagwörter
- Annealing, Industries, Planarization, Plasmas, Reliability engineering, Semiconductor device reliability, Wafer bonding