Future trends in charge trapping memories
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
Charge trapping memories offer advantages for scaling data flash memories in the sub 50nm groundrule. This paper reviews the progress of the main concepts in charge trapping, NROM and SONOS. Both have undergone significant new developments, like the 4 bits/cell for the NROM and the introduction of new materials for SONOS and new cell structures e.g. including Fin-Fet's. Depending on the progress during the next years these concepts will be even more able to compete with the still dominating floating gate techniques.
Details
Originalsprache | Englisch |
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Titel | ICSICT-2006 |
Herausgeber (Verlag) | IEEE Computer Society |
Seiten | 740-743 |
Seitenumfang | 4 |
ISBN (Print) | 1424401615, 9781424401611 |
Publikationsstatus | Veröffentlicht - 2006 |
Peer-Review-Status | Ja |
Extern publiziert | Ja |
Publikationsreihe
Reihe | ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings |
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Konferenz
Titel | ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology |
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Dauer | 23 - 26 Oktober 2006 |
Stadt | Shanghai |
Land | China |
Externe IDs
ORCID | /0000-0003-3814-0378/work/156338378 |
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