As semiconductor technologies approach the subnanometer node, conventional CMOS scaling faces fundamental physical limitations. To overcome these challenges, novel device architectures are being investigated to sustain performance improvements and enable enhanced functionality. This work explores silicon nanowire field-effect transistors (FETs) fabricated using a top-down, CMOS-compatible process, employing n-type phosphorus-doped channels with systematically varied doping concentrations. The influence of doping on carrier transport is investigated through back-gate, top-gate, and dual-gate configurations. Lightly doped devices exhibit transport dominated by Schottky-barrier modulation, enabling ambipolar and unipolar operation, polarity control, and tunable transfer characteristics with on/off current ratios up to 10⁸ and excellent p–n on-current symmetry of 1.67, emulating reconfigurable modes of operation. In contrast, increasing the doping concentration and reducing the channel length promote a transition toward junctionless operation. Highly doped short-channel devices with gate lengths down to 500 nm and cross-sectional dimensions of 20 nm exhibit unipolar operation, strong electrostatic control, and scalable junctionless behavior. These devices achieve on/off current ratios exceeding 10⁶, stable threshold voltages below 1 V, and moderate subthreshold swing. This work provides insight into the evolution of transport mechanisms from Schottky-barrier-controlled to junctionless operation, demonstrating doping-dependent switching of functionality within a CMOS-compatible platform.