Extending Microprocessor Trace Hardware for Fault Injection

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Abstract

This paper proposes a novel concept for fault injection based on the trace interface, which is originally intended for software debugging. Initially, an introduction to fault injection is presented. Following the illustration of the underlying infrastructure, requirements for the integration of fault injection are developed leading to the selection of instrumentation-based techniques. On this basis, this document details the implementation of a technique on register transfer level, supporting five fault models. Controllability and observability of faults are specified.

Details

OriginalspracheEnglisch
Titel8. GMM/ITG/GI-Symposium Reliability by Design (ZuE)
Seitenumfang8
PublikationsstatusVeröffentlicht - 21 Sept. 2015
Peer-Review-StatusJa

Konferenz

Titel8. GMM/ITG/GI-Symposium Reliability by Design
KurztitelZuE
Veranstaltungsnummer
Dauer21 - 23 September 2015
Ort
StadtSiegen
LandDeutschland

Schlagworte

Forschungsprofillinien der TU Dresden