Extending Microprocessor Trace Hardware for Fault Injection
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
This paper proposes a novel concept for fault injection based on the trace interface, which is originally intended for software debugging. Initially, an introduction to fault injection is presented. Following the illustration of the underlying infrastructure, requirements for the integration of fault injection are developed leading to the selection of instrumentation-based techniques. On this basis, this document details the implementation of a technique on register transfer level, supporting five fault models. Controllability and observability of faults are specified.
Details
Originalsprache | Englisch |
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Titel | 8. GMM/ITG/GI-Symposium Reliability by Design (ZuE) |
Seitenumfang | 8 |
Publikationsstatus | Veröffentlicht - 21 Sept. 2015 |
Peer-Review-Status | Ja |
Konferenz
Titel | 8. GMM/ITG/GI-Symposium Reliability by Design |
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Kurztitel | ZuE |
Veranstaltungsnummer | |
Dauer | 21 - 23 September 2015 |
Ort | |
Stadt | Siegen |
Land | Deutschland |