Data Stream Processing in Networks-on-Chip

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

Abstract

Nowadays, the growing complexity in a wide variety of applications has led to the use of Multiprocessor Systems-on-Chip (MPSoCs). Networks-on-Chip (NoCs) have emerged as a scalable intra-chip communication technology for a high number of processing elements. However, the evolution of MPSoCs shows increasing communication requirements due to the growing number of PEs. This paper presents a novel Network-on-Chip microarchitecture that combines data transfers with data stream processing to exploit efficiently the transmission time. Data stream processing is enabled by a lightweight processing unit that is located within the transmission channels of the NoC. Thus, data can be processed by operations either in a processing element such as a MicroBlaze processor or inside the NoC while it is transferred. Operations executed by the NoC reduce the workload of the processing elements. In addition, the transmission time will be efficiently used. The novel microarchitecture is evaluated and compared to a state-of-the-art router on a Xilinx Zynq FPGA.

Details

OriginalspracheEnglisch
Titel2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
Redakteure/-innenRicardo Reis, Mircea Stan, Michael Huebner, Nikolaos Voros
Herausgeber (Verlag)IEEE Computer Society
Seiten633-638
Seitenumfang6
ISBN (elektronisch)9781509067626
PublikationsstatusVeröffentlicht - 20 Juli 2017
Peer-Review-StatusJa

Publikationsreihe

ReiheIEEE Computer Society Annual Symposium on VLSI
ISSN2159-3477

Konferenz

Titel2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
Dauer3 - 5 Juli 2017
StadtBochum, North Rhine-Westfalia
LandDeutschland

Externe IDs

ORCID /0000-0003-2571-8441/work/142240452
Scopus 85027284422

Schlagworte

Schlagwörter

  • Data Stream Processing, FPGA, Many Core Systems, MPSoC, Network-on-Chip

Bibliotheksschlagworte