Charge trapping challenges of CMOS embedded complementary FeFETs

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

  • Sven Beyer - , Global Foundries Dresden (Autor:in)
  • Dominik Kleimaier - , Global Foundries Dresden (Autor:in)
  • Stefan Dunkel - , Global Foundries Dresden (Autor:in)
  • Halid Mulaosmanovic - , Global Foundries Dresden (Autor:in)
  • Steven Soss - , Global Foundries Dresden (Autor:in)
  • Johannes Muller - , Global Foundries Dresden (Autor:in)
  • Zhouhang Jiang - , University of Notre Dame (Autor:in)
  • Kai Ni - , University of Notre Dame (Autor:in)
  • Thomas Mikolajick - , Professur für Nanoelektronik, NaMLab - Nanoelectronic materials laboratory gGmbH (Autor:in)
  • Haidi Zhou - , Ferroelectric Memory Company (Autor:in)

Abstract

In this work, we examine one of the important wear-out effects in metal-ferroelectric-insulator-semiconductor (MFIS) ferroelectric FETs (FeFET), comparing n-type and p-type endurance cycling degradation of the devices and propose a sloshing bathtub model as physical explanation for this effect. We show that: i) polarization (PFE) switching is the main source of cycling degradation as demonstrated by severe VT-walkout through bipolar cycling with PFE switching pulses, while much less degradation without PFE switching, thus uni-polar pulsing, is observed; ii) comparing n-type and p-type cycling data, especially the n-type cycling degradation depends on the amount of interface trapped charge during the switching event, thus once ferroelectric (FE) bulk defects are fully charged up, electrons pile up at the FE/interlayer (FE/IL) interface, resulting in a steep VT increase; iii) a sloshing bathtub model is well-suited to explain the endurance degradation and can reproduce observed data; iv) this model can also explain a trapping artefact in HfO2-based MFIS/MFIM structures, often mistakenly interpreted as ferroelectric wake-up.

Details

OriginalspracheEnglisch
Titel2024 IEEE International Memory Workshop, IMW 2024 - Proceedings
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers (IEEE)
ISBN (elektronisch)9798350306521
PublikationsstatusVeröffentlicht - 2024
Peer-Review-StatusJa

Publikationsreihe

ReiheIEEE International Memory Workshop (IMW)
ISSN2330-7978

Workshop

Titel16th IEEE International Memory Workshop
KurztitelIMW 2024
Veranstaltungsnummer16
Dauer12 - 15 Mai 2024
Webseite
BekanntheitsgradInternationale Veranstaltung
OrtGrand Walkerhill Seoul Hotel
StadtSeoul
LandSüdkorea

Externe IDs

ORCID /0000-0003-3814-0378/work/163295408

Schlagworte

Schlagwörter

  • 28nm HKMG, endurance, FeFET, trapping