Schlagwörter

• field programmable gate arrays, multiprocessing systems, network-on-chip, application task, performance bottleneck, networks-on-chip, intra-chip communication technology, high-level synthesized processing units, application-specific operations, high-level synthesis, heterogeneous MultiProcessor Systems-on-Chip, NoC architecture, Ports (Computers), Computer architecture, System-on-chip, Network interfaces, Network-on-Chip, Manycore Systems, Application-Specific Processing, High-Level Synthesis, heterogeneous MPSoCs, processing element, PEs, application-specific processing, Dennard scaling, communication costs, MicroBlaze processor, FPGA, data transfers, Field programmable gate arrays, Programming, Multiaccess communication, MPSoC