Analyzing Cache Bandwidth on the Intel Core 2 Architecture
Publikation: Beitrag zu Konferenzen › Paper › Beigetragen › Begutachtung
Beitragende
Abstract
Intel Core 2 processors are used in servers, desktops, and notebooks. They combine the Intel64 Instruction Set Architecture with a new microarchitecture based on Intel Core and are proclaimed by their vendor as the “world’s best processors”. In this paper, measured bandwidths between the computing cores and the different caches are presented. The STREAM benchmark1 is one of the most used kernels by scientists to determine the memory bandwidth. For deeper insight the STREAM benchmark was redesigned to get exact values for small problem sizes as well. This analysis gives hints to faster data access and compares performance results for standard and tuned routines on the Intel Core 2 Architecture.
Details
Originalsprache | Englisch |
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Seiten | 365-372 |
Seitenumfang | 8 |
Publikationsstatus | Veröffentlicht - 2007 |
Peer-Review-Status | Ja |
Konferenz
Titel | International Conference on Parallel Computing 2007 |
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Kurztitel | ParCo 2007 |
Dauer | 4 - 7 September 2007 |
Webseite | |
Bekanntheitsgrad | Internationale Veranstaltung |
Stadt | Juelich |
Land | Deutschland |
Externe IDs
ORCID | /0009-0003-0666-4166/work/151475590 |
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