Analyzing Cache Bandwidth on the Intel Core 2 Architecture

Publikation: Beitrag zu KonferenzenPaperBeigetragenBegutachtung

Abstract

Intel Core 2 processors are used in servers, desktops, and notebooks. They combine the Intel64 Instruction Set Architecture with a new microarchitecture based on Intel Core and are proclaimed by their vendor as the “world’s best processors”. In this paper, measured bandwidths between the computing cores and the different caches are presented. The STREAM benchmark1 is one of the most used kernels by scientists to determine the memory bandwidth. For deeper insight the STREAM benchmark was redesigned to get exact values for small problem sizes as well. This analysis gives hints to faster data access and compares performance results for standard and tuned routines on the Intel Core 2 Architecture.

Details

OriginalspracheEnglisch
Seiten365-372
Seitenumfang8
PublikationsstatusVeröffentlicht - 2007
Peer-Review-StatusJa

Konferenz

TitelInternational Conference on Parallel Computing 2007
KurztitelParCo 2007
Dauer4 - 7 September 2007
Webseite
BekanntheitsgradInternationale Veranstaltung
StadtJuelich
LandDeutschland

Externe IDs

ORCID /0009-0003-0666-4166/work/151475590

Schlagworte

DFG-Fachsystematik nach Fachkollegium