Analyzing ARM CoreSight ETMV4.X Data Trace Stream with a Real-Time Hardware Accelerator

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Abstract

Debugging and verification of modern SoCs is a vital step in realizing complex systems consisting of various components. Monitoring memory operations such as data transfer address and value is an essential debugging and verification feature. ARM CoreSight technology generates a specific debug trace stream standard to monitor the memory without affecting the normal execution of the system. This paper proposes a hardware architecture to analyze the debug trace stream in realtime. It is implemented on the Xilinx Virtex xc6vcx75t-2ff784 FPGA device and can operate at 125 MHz and occupies less than 8 % of the FPGA resources.

Details

OriginalspracheEnglisch
TitelProceedings of the 2021 Design, Automation and Test in Europe, DATE 2021
ErscheinungsortGrenoble
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers (IEEE)
Seiten1606-1609
Seitenumfang4
ISBN (elektronisch)978-3-9819263-5-4
ISBN (Print)978-1-7281-6336-9
PublikationsstatusVeröffentlicht - 1 Feb. 2021
Peer-Review-StatusJa

Publikationsreihe

ReiheDesign, Automation and Test in Europe Conference and Exhibition (DATE)
ISSN1530-1591

Externe IDs

Scopus 85111030895
ORCID /0000-0002-6286-5064/work/142240676
Mendeley 87d3330b-0299-3bf3-ab45-fdef407fb7ac

Schlagworte

ASJC Scopus Sachgebiete

Schlagwörter

  • Debugging, System analysis and design, System verification, System-on-chips