A 1-V input, 0.45-V output switched-capacitor (SC) 2:1 voltage converter is developed in 65-nm CMOS. A proposed voltage-reference-free pulse density modulation (VRF-PDM) increased the efficiency from 17% to 73% at 50-μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot carrier injection to a comparator and a periodic activation scheme of the SC converter are also proposed to solve the problems attributed to VRF-PDM.