A study for replacing CMOS gates by equivalent inverters

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

  • Ch. Galani - , Aristotle University of Thessaloniki (Autor:in)
  • A. Tsormpatzoglou - , Aristotle University of Thessaloniki (Autor:in)
  • P. Chaourani - , Aristotle University of Thessaloniki (Autor:in)
  • I. Messaris - , Arbeitsbereich Medizinische Physik und biomedizinische Technik, Aristotle University of Thessaloniki (Autor:in)
  • S. Nikolaidis - , Aristotle University of Thessaloniki (Autor:in)

Abstract

Analysis of the operation of CMOS gates is a complicated procedure. These gates can be replaced by equivalent inverters and therefore the expressions for the inverters are used to determine the electrical characteristics of the gates. In this paper, the equivalent inverter approach for replacing CMOS gates is evaluated. The NAND gate is used for this evaluation. Parametric expressions are created to determine the transistors widths of the equivalent inverter. A systematic method is used for incorporating the parameter dependencies in the expressions. Results verify the accuracy of this approach.

Details

OriginalspracheEnglisch
Titel2015 IEEE International Symposium on Circuits and Systems (ISCAS)
Herausgeber (Verlag)IEEE Xplore
Seiten1838-1841
Seitenumfang4
ISBN (elektronisch)978-1-4799-8391-9
PublikationsstatusVeröffentlicht - 27 Mai 2015
Peer-Review-StatusJa

Publikationsreihe

ReiheIEEE International Symposium on Circuits and Systems (ISCAS)
ISSN0271-4302

Konferenz

TitelIEEE International Symposium on Circuits and Systems 2015
KurztitelISCAS 2015
Dauer24 - 27 Mai 2015
StadtLisbon
LandPortugal

Externe IDs

Scopus 84946197392

Schlagworte

Schlagwörter

  • Logic gates, Inverters, Delays, Integrated circuit modeling, Semiconductor device modeling, MOSFET