A study for replacing CMOS gates by equivalent inverters
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Beitragende
Abstract
Analysis of the operation of CMOS gates is a complicated procedure. These gates can be replaced by equivalent inverters and therefore the expressions for the inverters are used to determine the electrical characteristics of the gates. In this paper, the equivalent inverter approach for replacing CMOS gates is evaluated. The NAND gate is used for this evaluation. Parametric expressions are created to determine the transistors widths of the equivalent inverter. A systematic method is used for incorporating the parameter dependencies in the expressions. Results verify the accuracy of this approach.
Details
Originalsprache | Englisch |
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Titel | 2015 IEEE International Symposium on Circuits and Systems (ISCAS) |
Herausgeber (Verlag) | IEEE Xplore |
Seiten | 1838-1841 |
Seitenumfang | 4 |
ISBN (elektronisch) | 978-1-4799-8391-9 |
Publikationsstatus | Veröffentlicht - 27 Mai 2015 |
Peer-Review-Status | Ja |
Publikationsreihe
Reihe | IEEE International Symposium on Circuits and Systems (ISCAS) |
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ISSN | 0271-4302 |
Konferenz
Titel | IEEE International Symposium on Circuits and Systems 2015 |
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Kurztitel | ISCAS 2015 |
Dauer | 24 - 27 Mai 2015 |
Stadt | Lisbon |
Land | Portugal |
Externe IDs
Scopus | 84946197392 |
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Schlagworte
Schlagwörter
- Logic gates, Inverters, Delays, Integrated circuit modeling, Semiconductor device modeling, MOSFET