A robustness study on self-alignment of thin-si dies using surface tension
Publikation: Beitrag in Fachzeitschrift › Forschungsartikel › Beigetragen › Begutachtung
Beitragende
Abstract
We found that self-alignment accuracy was better than ±2 μm in the case with an initial offset of up to 1 mm. This method, driven by the surface tension force of the liquid, offers new technical solutions for both high accuracy chip bonding and low cost placement manner. Some important points, such as wetting behaviour, die release offset, and the influence of defects on a die, were studied in order to suggest approaches to robustness in this new technique.
Details
Originalsprache | Englisch |
---|---|
Seiten (von - bis) | 227-230 |
Seitenumfang | 4 |
Fachzeitschrift | Journal of Japan Institute of Electronics Packaging |
Jahrgang | 16 |
Ausgabenummer | 3 |
Publikationsstatus | Veröffentlicht - Sept. 2013 |
Peer-Review-Status | Ja |
Extern publiziert | Ja |
Externe IDs
ORCID | /0000-0002-0757-3325/work/139064942 |
---|
Schlagworte
ASJC Scopus Sachgebiete
Schlagwörter
- Chip on Wafer, Self-Alignment, Surface Tension, Thin-Si Die