A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
Random linear network coding (RLNC) has great potential to improve security, reliability, energy efficiency and throughput of many applications in networking and storage applications. The high computation costs and power consumption caused a reduction of interest in RLNC research more than ten years ago. We present a distributed parallel computation platform aiming at making RLNC affordable and scalable enough to be deployed in real-life-sized applications. As key component of this platform, an MPSoC was developed, produced and measured in our lab. The design aims at high energy efficiency and utilizes a hierarchical communication system for scalability to reach data rates needed by real-life applications with a reasonable power budget. For example, our platform would suffice to equip a 36 Gb/s backplane, 20 W Ethernet switch with an RLNC accelerator on a power budget of 2.4 W, showing an energy efficiency of 37 pJ/b.
Details
Originalsprache | Englisch |
---|---|
Titel | 2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
Herausgeber (Verlag) | IEEE Computer Society |
Seiten | 217-222 |
Seitenumfang | 6 |
ISBN (elektronisch) | 978-1-6654-6605-9 |
ISBN (Print) | 978-1-6654-6606-6 |
Publikationsstatus | Veröffentlicht - 6 Juli 2022 |
Peer-Review-Status | Ja |
Publikationsreihe
Reihe | IEEE Computer Society Annual Symposium on VLSI |
---|---|
ISSN | 2159-3477 |
Konferenz
Titel | 20th IEEE Computer Society Annual Symposium on VLSI |
---|---|
Kurztitel | ISVLSI 2022 |
Veranstaltungsnummer | 20 |
Dauer | 4 - 6 Juli 2022 |
Webseite | |
Ort | Aliathon Resort |
Stadt | Pafos |
Land | Zypern |
Externe IDs
Ieee | 10.1109/ISVLSI54635.2022.00050 |
---|
Schlagworte
Ziele für nachhaltige Entwicklung
ASJC Scopus Sachgebiete
Schlagwörter
- low power, memory management, MPSoC, network coding, NoC, RLNC