A 22 nm 10 TOPS Mixed-Precision Neural Network SoC for Image Processing with Energy-Efficient Dilated Convolution Support

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

Abstract

Dilated convolutions have become popular in recent Deep Neural Networks (DNNs). However, they introduce additional zeros within the weights. To efficiently compute these layers within image processing DNNs, we implemented a 10 TOPS neural network SoC in 22 nm that supports dilated convolutions with reduced energy consumption. By exploiting this advantage, the energy can be reduced by a factor of 4.46 even for DNNs such as DeepLabV3+ with a majority of standard convolutional layers.

Details

OriginalspracheEnglisch
Titel2024 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers (IEEE)
Seitenumfang3
ISBN (elektronisch)979-8-3503-8414-7
ISBN (Print)979-8-3503-8415-4
PublikationsstatusVeröffentlicht - 19 Apr. 2024
Peer-Review-StatusJa

Konferenz

Titel27th IEEE Symposium in Low-Power and High-Speed Chips
KurztitelCOOL CHIPS 27
Veranstaltungsnummer27
Dauer17 - 19 April 2024
Webseite
OrtThe University of Tokyo
StadtTokyo
LandJapan

Externe IDs

Scopus 85194142861

Schlagworte