Time-based Memristor Crossbar Array Programming for Stochastic Computing Parallel Sequence Generation

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

  • Nikos Temenos - , National Technical University of Athens (Autor:in)
  • Vasileios Ntinas - , Professur für Grundlagen der Elektronik, Democritus University of Thrace (Autor:in)
  • Paul P. Sotiriadis - , National Technical University of Athens (Autor:in)
  • Georgios Ch Sirakoulis - , Democritus University of Thrace (Autor:in)

Abstract

The so far dominant Von Neumann architecture is being challenged by the energy demanding communication bottle-neck between processing and memory units. To address this issue, in-memory computing is employed for their co-location, with memristive crossbar arrays playing an important role towards this goal. Motivated by the above, this work introduces a timing-based programming of a memristor crossbar array for sequence generation in Stochastic Computing (SC). Its operation principle is based on the stochastic nature of the memristor devices forming the crossbar array, where their programming is regulated by the switching probability that follows the Poisson distribution, controlled by pulse amplitude and duration. The timing-based programming of the proposed crossbar array increases the discretization levels of the output probability values, thereby offering more accurate control when compared to programming schemes that consider only the pulse amplitude. The memristor's stochasticity along with the crossbar's inherent parallelism opens the in-memory design space allowing SC elements to be used as sequences are generated efficiently. Simulation results on different programming pulse-width precisions highlight the proposed crossbar's effectiveness in sequence generation, supported by mean absolute error (MAE) results in a standard SC arithmetic operation. Process variations stemming from the crossbar array affecting the sequence generation in SC are investigated.

Details

OriginalspracheEnglisch
TitelISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers (IEEE)
Seiten1-5
ISBN (elektronisch)9781665451093
PublikationsstatusVeröffentlicht - 2023
Peer-Review-StatusJa

Publikationsreihe

ReiheProceedings - IEEE International Symposium on Circuits and Systems
Band2023-May
ISSN0271-4310

Konferenz

TitelIEEE International Symposium on Circuits and Systems 2023
UntertitelTechnology Disruption and Society
KurztitelISCAS 2023
Veranstaltungsnummer56
Dauer21 - 25 Mai 2023
Webseite
BekanntheitsgradInternationale Veranstaltung
OrtMonterey Conference Center
StadtMonterey
LandUSA/Vereinigte Staaten

Externe IDs

ORCID /0000-0002-2367-5567/work/168720258

Schlagworte

ASJC Scopus Sachgebiete

Schlagwörter

  • In-Memory Computing, Memristor Crossbar Array, Probabilistic Switching, Stochastic Computing