Biologically plausible neuromorphic computing systems are attracting considerable attention due to their low latency, massively parallel information processing abilities, and their high energy efficiency. To achieve these features neuromorphic silicon neuron circuits need to be integrated with plastic synapse circuits capable of on-line learning and storage of synaptic weights. Within this context, memristive devices play a key role thanks to their non-volatility, scalability, and compatibility with the complementary metal–oxide–semiconductor fabrication process. However, neuro-memristive systems are still facing difficult challenges for implementing efficient learning protocols. Here, we propose and demonstrate in hardware a spike-driven threshold-based learning rule which goes beyond conventional spike-timing dependent plasticity mechanisms, by also taking into account the neuron membrane potential and its firing rate. The mixed memristive–neuromorphic system we demonstrate comprises an oxide-based memristive synapse device placed between two silicon neurons implemented on a neuromorphic chip that comprises the proper interfacing and spike-based learning circuits designed to drive the memristive elements. We show how the system is able to emulate in real-time weight dependent post-synaptic activity and drive synaptic weight updates at the memristive synapse level following the spike-driven learning rule presented. We validate this spike-based learning mechanism with experimental results and quantify the system performance with basic learning experiments.