Simulation of Low Power Self-Selective Memristive Neural Networks for in situ Digital and Analogue Artificial Neural Network Applications

Publikation: Beitrag in FachzeitschriftForschungsartikelBeigetragenBegutachtung

Beitragende

  • Charalampos Tsioustas - , National Technical University of Athens (Autor:in)
  • Panagiotis Bousoulas - , National Technical University of Athens (Autor:in)
  • Jack Hadfield - , National Technical University of Athens (Autor:in)
  • Theodoros Panagiotis Chatzinikolaou - , Democritus University of Thrace (Autor:in)
  • Iosif Angelos Fyrigos - , Democritus University of Thrace (Autor:in)
  • Vasileios Ntinas - , Democritus University of Thrace (Autor:in)
  • Michail Antisthenis Tsompanas - , Democritus University of Thrace (Autor:in)
  • Georgios Ch Sirakoulis - , Democritus University of Thrace (Autor:in)
  • Dimitris Tsoukalas - , National Technical University of Athens (Autor:in)

Abstract

Self-selective memory devices are considered promising candidates for suppressing the undesired sneak path currents that appear within crossbar memory structures and compromise their performance during the write and read operations. Along these lines, in this work we present forming free SiO$_{\mathbf{2}}$-based resistive devices with inherent self-selection and self-compliance properties. The devices can operate in dual mode, since they can perform volatile threshold switching and non-volatile bipolar resistive behavior by regulating the external voltage amplitude. Interestingly, the devices exhibit low operating voltage ($\sim$260 - 360 mV) and quick response time ($\sim$100 ns). A comprehensive model is then developed in order to interpret this unique feature and provide valuable insights into the underlying physical mechanisms. Additionally, self-activated neural networks are theoretically investigated by performing in-situ digital and analog computations, whereas the calculated outcomes are compared with traditional neural networks with transistors as selecting elements. More specifically, a logic NAND gate and supervised learning upon the MNIST dataset is performed, while the proposed neural network architecture is tuned differently according to the application. Notably, the acquired results are comparable with the respective data where selectors have been employed, indicating the promising aspects of the proposed memristive devices. Moreover, a thorough analysis is carried out regarding the correlation between the device's linearity and the recognition's accuracy score, offering valuable insights. The proposed architecture paves the way for the development of energy-efficient artificial neural network computing architectures with tunable properties.

Details

OriginalspracheEnglisch
Seiten (von - bis)505-513
Seitenumfang9
FachzeitschriftIEEE transactions on nanotechnology
Jahrgang21
PublikationsstatusVeröffentlicht - 2022
Peer-Review-StatusJa
Extern publiziertJa

Externe IDs

ORCID /0000-0002-2367-5567/work/168720252

Schlagworte

Schlagwörter

  • Artificial neural network applications, linearity, memristive logic, non-volatile bipolar resistive switching, self-selectivity, volatile threshold switching