Revisiting Fault-Injection Experiment-Platform Architectures
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
Many years of research on dependable, fault-tolerant software systems yielded a myriad of tool implementations for vulnerability analysis and experimental validation of resilience measures. Trace recording and fault injection are among the core functionalities these tools provide for hardware debuggers or system simulators, partially including some means to automate larger experiment campaigns. We argue that current fault-injection tools are too highly specialized for specific hardware devices or simulators, and are developed in poorly modularized implementations impeding evolution and maintenance. In this article, we present a novel design approach for a fault-injection infrastructure that allows experimenting researchers to switch simulator or hardware back ends with little effort, fosters experiment code reuse, and retains a high level of maintainability.
Details
Originalsprache | Englisch |
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Titel | 2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing |
Herausgeber (Verlag) | IEEE |
Seiten | 284-285 |
Seitenumfang | 2 |
ISBN (Print) | 978-0-7695-4590-5 |
Publikationsstatus | Veröffentlicht - 14 Dez. 2011 |
Peer-Review-Status | Ja |
Konferenz
Titel | 2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing |
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Dauer | 12 - 14 Dezember 2011 |
Ort | Pasadena, CA, USA |
Externe IDs
Scopus | 84857774793 |
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ORCID | /0000-0002-1427-9343/work/167216807 |
Schlagworte
Schlagwörter
- Hardware, Circuit faults, Fault tolerance, Fault tolerant systems, Programming, Buffer storage, Switches