Revisiting Fault-Injection Experiment-Platform Architectures

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

  • Horst Schirmeier - , Professur für Betriebssysteme, Technische Universität (TU) Dortmund (Autor:in)
  • Martin Hoffmann - , Friedrich-Alexander-Universität Erlangen-Nürnberg (Autor:in)
  • Rudiger Kapitza - , Friedrich-Alexander-Universität Erlangen-Nürnberg (Autor:in)
  • Daniel Lohmann - , Friedrich-Alexander-Universität Erlangen-Nürnberg (Autor:in)
  • Olaf Spinczyk - , Technische Universität (TU) Dortmund (Autor:in)

Abstract

Many years of research on dependable, fault-tolerant software systems yielded a myriad of tool implementations for vulnerability analysis and experimental validation of resilience measures. Trace recording and fault injection are among the core functionalities these tools provide for hardware debuggers or system simulators, partially including some means to automate larger experiment campaigns. We argue that current fault-injection tools are too highly specialized for specific hardware devices or simulators, and are developed in poorly modularized implementations impeding evolution and maintenance. In this article, we present a novel design approach for a fault-injection infrastructure that allows experimenting researchers to switch simulator or hardware back ends with little effort, fosters experiment code reuse, and retains a high level of maintainability.

Details

OriginalspracheEnglisch
Titel2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing
Herausgeber (Verlag)IEEE
Seiten284-285
Seitenumfang2
ISBN (Print)978-0-7695-4590-5
PublikationsstatusVeröffentlicht - 14 Dez. 2011
Peer-Review-StatusJa

Konferenz

Titel2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing
Dauer12 - 14 Dezember 2011
OrtPasadena, CA, USA

Externe IDs

Scopus 84857774793
ORCID /0000-0002-1427-9343/work/167216807

Schlagworte

Schlagwörter

  • Hardware, Circuit faults, Fault tolerance, Fault tolerant systems, Programming, Buffer storage, Switches