In a previous paper the authors presented a model to calculate the on-state voltage drop of thyristor and diode modules more accurately than with the commonly used linear model. The resulting alphabeta-Model had so far been experimentally validated with single, sinusoidal current half-waves. In this paper, the measurements are extended to a higher number of modules as well as longer time periods - the model is thus further validated. Based on this model, a simulative investigation of thyristor module parallel connection is executed which leads to advice on how to optimize a practical rectifier design for a minimal current sharing mismatch.