In this paper, we present two possible variations of Q3.5 bit lookup-table based hardware accelerators for the Gaussian Error Linear Unit (GELU): the Full-LUT variant, which stores all 193 entries explicitly, and the Range-Merged LUT variant, which compacts runs into range tests, leaving 85 explicit entries plus two bypass branches. The Full-LUT variant occupies 112.495 μm², operates at 3.33 GHz, and consumes 0.19921 mW, while the Range-Merged LUT variant occupies 146.232 μm², operates at 5.00 GHz, and consumes 0.464255 mW. When integrated into a Vision Transformer (ViT-B/16) model for ImageNet classification, both show negligible accuracy loss compared to full-precision GELU, demonstrating the efficacy of low bit LUT approximations for high efficiency ViT inference.