OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory
Publikation: Beitrag in Fachzeitschrift › Forschungsartikel › Beigetragen › Begutachtung
Beitragende
Abstract
Memristive devices promise an alternative approach toward non-Von Neumann architectures, where specific computational tasks are performed within the memory devices. In the Machine Learning (ML) domain, crossbar arrays of resistive devices have shown great promise for ML inference, as they allow for hardware acceleration of matrix multiplications. But, to enable widespread adoption of these novel architectures, it is critical to have an automatic compilation flow as opposed to relying on a manual mapping of specific kernels on the crossbar arrays. We demonstrate the programmability of memristor-based accelerators using the new compiler design principle of multi-level rewriting, where a hierarchy of abstractions lower programs level-by-level and perform code transformations at the most suitable abstraction. In particular, we develop a prototype compiler, which progressively lowers a mathematical notation for tensor operations arising in ML workloads, to fixed-function memristor-based hardware blocks.
Details
Originalsprache | Englisch |
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Seiten (von - bis) | 1674 - 1686 |
Seitenumfang | 13 |
Fachzeitschrift | IEEE transactions on computer-aided design of integrated circuits and systems |
Jahrgang | 41 |
Ausgabenummer | 6 |
Publikationsstatus | Angenommen/Im Druck - 2021 |
Peer-Review-Status | Ja |
Schlagworte
Forschungsprofillinien der TU Dresden
ASJC Scopus Sachgebiete
Schlagwörter
- Common Information Model (computing), Computer architecture, Computing-In-Memory, Hardware, MLIR, Machine Learning., Memristor, Memristors, Phase change materials, Runtime library, Tensors