MAPS: Mapping concurrent dataflow applications to heterogeneous MPSoCs

Publikation: Beitrag in FachzeitschriftForschungsartikelBeigetragenBegutachtung

Beitragende

  • Jeronimo Castrillon - , RWTH Aachen University (Autor:in)
  • Rainer Leupers - , RWTH Aachen University (Autor:in)
  • Gerd Ascheid - , RWTH Aachen University (Autor:in)

Abstract

Today's embedded systems are powered by heterogeneous Multi-Processor Systems on Chip (MPSoCs) in order to cope with the increasing applications demands and the tight energy budget of portable devices. The complexity of these systems makes them difficult to program, which has caused academia and industry to look for alternative methodologies and models. In the particular case of multimedia and baseband processing, dataflow models are being proposed and appear to be a sensible choice to represent applications.

Details

OriginalspracheEnglisch
Seiten (von - bis)527-545
Seitenumfang19
FachzeitschriftIEEE transactions on industrial informatics
Jahrgang9
Ausgabenummer1
PublikationsstatusVeröffentlicht - 2013
Peer-Review-StatusJa
Extern publiziertJa

Externe IDs

ORCID /0000-0002-5007-445X/work/141545593

Schlagworte

Forschungsprofillinien der TU Dresden

Schlagwörter

  • Composability, dataflow graphs, hardware scheduler, heterogeneous, mapping, MPSoC, real-time, scheduling

Bibliotheksschlagworte