Schlagwörter

• 0 MHz, 0 m, 0 mus, 0 nm, 3 mW, 5 mW, CMOS integrated circuits, CMOS technology, Adaptive digital tuning, Baseline wander, Bit error rate, Cable lengths, Cable loss, Digital control, Digital control logic, Equalisers, Error statistics, Fast Ethernet PHY chip, First-order high pass filters, Flat loss compensation, Frequency 125, High-pass filters, Local area networks, Low power analogue equaliser, Low-power electronics, Multiinput OTA structure, Operational amplifiers, Operational transconductance amplifiers, Power 2, Power 6, Power consumption, Size 120, Size 180, Time 250, Twisted pair cables, Unshielded twisted pair cables