Extending a compiler backend for complete memory error detection

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

Abstract

Technological advances drive hardware to ever smaller feature sizes' causing devices to become more vulnerable to faults. Applications can be protected against errors resulting from faults by adding error detection and recovery measures in software. This is popularly achieved by applying automatic program transformations. However' transformations applied to intermediate program representations are fundamentally incapable of protecting against vulnerabilities that are introduced during compilation. In particular' the compiler backend may introduce additional memory accesses. This report presents an extended compiler backend that protects these accesses against faults in the memory system. It is demonstrated that this enables the detection of all single bit flips in memory. On a subset of SPEC CINT2006 the runtime overhead caused by the extended backend amounts to 1:50x for the 32-bit processor architecture i386' and 1:13x for the 64-bit architecture x86 64.

Details

OriginalspracheEnglisch
TitelAutomotive - Safety and Security 2017
Redakteure/-innenErhard Plodereder, Peter Dencker, Herbert Klenk, Hubert B. Keller
Herausgeber (Verlag)Gesellschaft fur Informatik (GI)
Seiten61-74
Seitenumfang14
ISBN (elektronisch)9783885796633
PublikationsstatusVeröffentlicht - 2017
Peer-Review-StatusJa

Publikationsreihe

ReiheGI-Edition : lecture notes in informatics. Proceedings
BandP-269
ISSN1617-5468

Konferenz

Titel7. Tagung Automotive � Safety and Security 2017: Sicherheit und Zuverlassigkeit fur Automobile Informationstechnik - 7th Conference on Automotive - Safety and Security 2017: Safety and Reliability for Automotive Information Technology
Dauer30 - 31 Mai 2017
StadtStuttgart
LandDeutschland

Externe IDs

ORCID /0000-0002-5007-445X/work/141545556

Schlagworte

Forschungsprofillinien der TU Dresden

ASJC Scopus Sachgebiete

Schlagwörter

  • Code generation, Compiler backend, Error detection, Fault tolerance, Intermediate representation (IR), LLVM, Memory errors, Resilience, Soft errors, Transient hardware faults