This paper presents an analysis of the start-up time and injection locking in ring oscillators and develops a mathematical model for the start-up time. Two low-power CMOS-based voltage-controlled injection-locked ring oscillators (VCILROs)-a three-stage and a nine-stage-are designed and fabricated in standard 130 nm BiCMOS technology to validate the theory and compare their performance. Using the frequency tunability feature acquired by employing a variable RC network, the VCILRO provides the calibration feature to compensate for process, voltage, and temperature (PVT) variations. The oscillation frequency of both presented VCILROs can be locked to the injected reference signal to improve frequency stability. The three-stage and nine-stage oscillators are powered from a 0. 9V supply and consume 8.9 μ W and 76.8 μ W of DC power at 50 MHz. The three-stage and nine-stage VCILROs occupy areas of 0.0015 mm²and 0.0048 mm², respectively.