Demystifying Intel Data Streaming Accelerator for In-Memory Data Processing

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Beitragende

Abstract

In-memory data processing is the state-of-the-art approach for large-scale data analytics. For a more efficient processing and to be able to store more data in main memory, new hardware developments for memory such as Compute Express Link (CXL) and High-Bandwidth Memory (HBM) are of great interest. However, these developments also heterogenize the memory hierarchy, increasing the importance of efficient data transfers between different memory types and locations.
To this end, Intel offers a new on-chip memory-operation accelerator called Data Streaming Accelerator (DSA) in modern Xeon Scalable processors. In this paper, we introduce this accelerator and present results of an experimental analysis from the perspective of in-memory processing. Moreover, we draw conclusions from our experimental analysis and finally discuss a concrete optimization idea for the in-memory data processing using DSA. Our idea is called on-the-fly data distribution (ODD) and considers HBM as a memory accelerator for DRAM-oriented in-memory data porcessing. Our evaluation shows that the DSA increases the benefit of ODD compared to a pure CPU-based approach.

Details

OriginalspracheEnglisch
TitelProceedings of the 2nd Workshop on Disruptive Memory Systems
Herausgeber (Verlag)Association for Computing Machinery
Seiten9-16
Seitenumfang8
ISBN (Print)979-8-4007-1303-3
PublikationsstatusVeröffentlicht - 3 Nov. 2024
Peer-Review-StatusJa

Externe IDs

ORCID /0000-0002-1427-9343/work/167706667
ORCID /0000-0001-8107-2775/work/167707085