DC and AC Performance of InGaZnO Thin-Film Transistors on Flexible PEEK Substrate
Publikation: Beitrag in Fachzeitschrift › Forschungsartikel › Beigetragen › Begutachtung
Beitragende
Abstract
Thin-film transistors (TFTs) play a vital role in flexible electronics. Here, vacuum-processed amorphous indium–gallium–zinc–oxide-based TFTs are fabricated on a 50 $\mu$ m thick polyetheretherketone (PEEK) flexible substrate. The ac and dc performances of TFTs with channel length down to 3 $\mu$ m are studied. The devices exhibit effective mobility, threshold voltage, and ON-/OFF-current ratio 19.6 cm $^{\text{2}}$ $\cdot$ V $^{-\text{1}}$ $\cdot$ s $^{-\text{1}}$ , 2.9 V, and $\text{3}\ttimes\text{10}^{\text{10}}$ , respectively. To address device stability, bias stress tests are performed, resulting in the maximum variation in the threshold voltage of $+$ 0.3 and $-$ 0.6 V for a gate voltage stress of $+$ 5 and $-$ 5 V, respectively, applied for 10 min. The ac performances of InGaZnO (IGZO)-based TFT on this substrate are reported for the first time. Here, the measured unity gain current frequency and unity gain power frequency are 5.4 and 28.5 MHz. Additionally, the TFTs stay fully functional when bent to radii as small as 3 mm exhibiting only minor mobility and threshold voltage variations of $+$ 0.4% and $-$ 0.2 V. After a dynamic bending test up to 5000 cycles, the mobility and threshold voltage of the TFT deviate by $+$ 12.9% and $+$ 0.2 V, respectively. These results demonstrate that biocompatible PEEK is a potential substrate for the realization of future unobtrusive wearable systems.
Details
Originalsprache | Englisch |
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Aufsatznummer | 10677371 |
Seiten (von - bis) | 1-6 |
Seitenumfang | 6 |
Fachzeitschrift | IEEE Transactions on Electron Devices |
Jahrgang | PP |
Ausgabenummer | 99 |
Publikationsstatus | Veröffentlicht - 2024 |
Peer-Review-Status | Ja |
Externe IDs
ORCID | /0000-0002-4152-1203/work/167706961 |
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unpaywall | 10.1109/ted.2024.3453220 |
Scopus | 85205393160 |
Schlagworte
Schlagwörter
- Frequency measurement, Logic gates, Performance evaluation, Stress, Substrates, Thin film transistors, Threshold voltage