In this paper, we show a power amplifier (PA) with stacked transistors. It is fabricated in a 250nm standard BiC-MOS technology. An adaptive adjustment of the base voltage at the upper transistor ensures equal collector-emitter voltages over the stacked transistors for all operating conditions. Additionally, a slight enhancement of the maximum efficiency was measured. By using an input amplifier with serial negative feedback for gain bandwidth enhancement over the frequency and an output amplifier with parallel negative feedback the PA provides a 3dB gain bandwidth of about 800 MHz and a 1 dB compression point bandwidth of about 1.4 GHz at an operation frequency of 2.6 GHz in measurements.