Big data causing big (TLB) problems: Taming random memory accesses on the GPU

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

Abstract

GPUS are increasingly adopted for large-scale database processing, where data accesses represent the major part of the computation. If the data accesses are irregular, like hash table accesses or random sampling, the GPU performance can suffer. Especially when scaling such accesses beyond 2GB of data, a performance decrease of an order of magnitude is encountered. This paper analyzes the source of the slowdown through extensive micro-benchmarking, attributing the root cause to the Translation Look aside Buffer (TLB). Using the micro-benchmarks, the TLB hierarchy and structure are fully analyzed on two different GPU architectures, identifying never before- published TLB sizes that can be used for efficient large-scale application tuning. Based on the gained knowledge, we propose a TLB-conscious approach to mitigate the slowdown for algorithms with irregular memory access. The proposed approach is applied to two fundamental database operations - random sampling and hash-based grouping - showing that the slowdown can be dramatically reduced, and resulting in a performance increase of up to 13x.

Details

OriginalspracheEnglisch
TitelDAMON '17: Proceedings of the 13th International Workshop on Data Management on New Hardware
Herausgeber (Verlag)Association for Computing Machinery (ACM), New York
Seitenumfang10
ISBN (Print)978-1-4503-5025-9
PublikationsstatusVeröffentlicht - 14 Mai 2017
Peer-Review-StatusJa

Publikationsreihe

ReiheMOD: International Conference on Management of Data (DaMoN)
ISSN0730-8078

Konferenz

Titel13th International Workshop on Data Management on New Hardware, DAMON 2017
Dauer14 - 19 Mai 2017
StadtChicago
LandUSA/Vereinigte Staaten

Externe IDs

Scopus 85021772296
ORCID /0000-0001-8107-2775/work/142253579

Schlagworte

ASJC Scopus Sachgebiete

Schlagwörter

  • GPU, Grouping, Random memory access, TLB, Virtual memory