Hardware Transactional Memory (HTM) implementations are be-
coming available in commercial, off-the-shelf components. While
generally comparable, some implementations deviate from the
strict all-or-nothing property of pure Transactional Memory. In-
stead of trying to hide them, we lift these deviations to a simple
transactional resurrection mechanism that can be used to accel-
erate and simplify both transactional and non-transactional pro-
gramming constructs. We implement our modifications both archi-
tecturally and micro-architecturally in a detailed HTM proposal,
without changes to system software and only light modifications
to the existing HTM microarchitecture. We then show applica-
tion of transactional resurrection in both transactional and non-
transactional parallel programming: hybrid transactional memory;
transactional escape actions; alert-on-update; and transactional sus-
pend / resume.