An analytical model for the CMOS inverter
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
A new analytical model for the CMOS inverter is introduced. This model results by solving analytically the differential equation which describes the inverter operation. It uses new simplified transistor current expressions which are developed taking into account the nanoscale effects and also considering temperature as a parameter. Expressions for the output voltage are derived, which are then used for capturing the output and supply currents, making the model compatible with CCS technology requirements. The proposed model is parametric according to the input signal slew, output load, transistor widths, supply voltage, temperature and process parameters. It presents an average error less than 3% for the typical case.
Details
Originalsprache | Englisch |
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Titel | 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) |
Herausgeber (Verlag) | Wiley-IEEE Press |
Seiten | 1-6 |
Seitenumfang | 6 |
ISBN (Print) | 978-1-4799-5412-4 |
Publikationsstatus | Veröffentlicht - 1 Okt. 2014 |
Peer-Review-Status | Ja |
Konferenz
Titel | 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) |
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Dauer | 29 September - 1 Oktober 2014 |
Ort | Palma de Mallorca, Spain |
Externe IDs
Scopus | 84916918836 |
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Schlagworte
Schlagwörter
- Analytical models, Transistors, Threshold voltage, Inverters, Accuracy, Semiconductor device modeling, Temperature dependence