A Survey on Architectures, Hardware Acceleration and Challenges for In-Network Computing

Publikation: Beitrag in FachzeitschriftForschungsartikelBeigetragenBegutachtung

Abstract

By moving data and computation away from the end user to more powerful servers in the cloud or to cloudlets at the edge, end user devices only need to compute locally for small amounts of data and when low latency is required. However, with the advent of 6G and Internet-of-Everything, the demand for more powerful networks continues to grow. The introduction of Software-Defined Networking and Network Function Virtualization has allowed us to rethink networks and use them for more than just routing data to servers. In addition, the use of more powerful network devices is bringing new life to the concept of active networks in the form of in-network computing. In-Network Computing provides the ability to move applications into the network and process data on programmable network devices as they are transmitted. In this work, we provide an overview of in-network computing and its enabling technologies. We take a look at the programmability and different hardware architectures for SmartNICs and switches, focusing primarily on accelerators such as FPGAs. We discuss the state of the art and challenges in this area, and look at CGRAs, a class of hardware accelerators that hase not been widely discussed in this context.

Details

Titel in Übersetzung
Ein Survey über Architekturen, Hardware-Beschleunigung und Herausforderungen für In-Network Computing
OriginalspracheEnglisch
Seitenumfang32
FachzeitschriftACM Transactions on Reconfigurable Technology and Systems
PublikationsstatusElektronische Veröffentlichung vor Drucklegung - 10 Okt. 2024
Peer-Review-StatusJa

Externe IDs

ORCID /0000-0003-2571-8441/work/169640766
unpaywall 10.1145/3699514