A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

  • Amit Kumar Singh - , Nanyang Technological University (Autor:in)
  • Akash Kumar - , National University of Singapore, Eindhoven University of Technology (Autor:in)
  • Thambipillai Srikanthan - , Nanyang Technological University (Autor:in)

Abstract

Modern embedded systems are based on Multiprocessor- Systems-on-Chip (MPSoCs) to meet the strict timing deadlines of multiple applications. MPSoC resources must be utilized efficiently by mapping the applications in throughput-aware manner in order to meet throughput constraints for each of them. A design-time methodology is applicable only to predefined set of applications with static behavior, which is incapable of handling dynamism in applications. On the other hand, a run-time approach can cater to the dynamism but cannot provide timing guarantees for all the applications due to large computation requirements at run-time. This paper presents a hybrid flow which performs compute intensive analysis at design-time to derive multiple resource-throughput trade-off points and selects one of these at runtime subject to available resources and desired throughput. Experimental results show that the design-time analysis is faster by 39%, provides better trade-off points and the runtime mapping is speeded up by 93% when compared to state-of-the-art techniques.

Details

OriginalspracheEnglisch
TitelEmbedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11
Seiten175-184
Seitenumfang10
PublikationsstatusVeröffentlicht - 2011
Peer-Review-StatusJa
Extern publiziertJa

Konferenz

TitelEmbedded Systems Week 2011, ESWEEK 2011 - 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11
Dauer9 - 14 Oktober 2011
StadtTaipei
LandTaiwan

Schlagworte

Forschungsprofillinien der TU Dresden

Schlagwörter

  • Design-time analysis, Multiprocessor, Run-time mapping, Synchronous dataflow, Throughput