A Digital Memristor Emulator for FPGA-Based Artificial Neural Networks

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

  • I. Vourkas - , Pontificia Universidad Católica de Chile (Autor:in)
  • A. Abusleme - , Pontificia Universidad Católica de Chile (Autor:in)
  • V. Ntinas - , Democritus University of Thrace (Autor:in)
  • G.C. Sirakoulis - , Democritus University of Thrace (Autor:in)
  • A. Rubio - , UPC Universitat Politècnica de Catalunya (Barcelona Tech) (Autor:in)

Abstract

FPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain human brain-like functionalities at circuit-level. In this context, the memristor has been proposed as the electronic analogue of biological synapses, but the price of commercially available samples still remains high, hence motivating the development of HW emulators. In this work we present the first digital memristor emulator based upon a voltagecontrolled threshold-type bipolar memristor model. We validate its functionality in low-cost yet powerful FPGA families. We test its suitability for complex memrisive circuits and prove its synaptic properties in a small associative memory via a perceptron ANN.

Details

OriginalspracheEnglisch
Titel2016 1st IEEE International Verification and Security Workshop, IVSW 2016
PublikationsstatusVeröffentlicht - 2016
Peer-Review-StatusJa
Extern publiziertJa

Externe IDs

Scopus 84992089820